Education
PhD, Banasthali Vidyapith,Rajasthan, India (In-Progress)
M.Tech(VLSI Design), Banasthali Vidyapith,Rajasthan, India 2009
B.Tech(ECE), UP Technical University,Lucknow, India 2006
Subjects Taught / Student Project Mentor
VLSI Design
VLSI Technology
MATLAB Simulation
Front End Designing
Medical Image Processing
Artificial Neural Networks
Digital Electronics
Basic Electronics
Fundamentals of Electronics
Microprocessor & Micro controller
Advanced Semiconductor Devices
Research & Publications
Shivangi Tyagi, Khem Kumar Nagar, Kanchan Sharma, (2013) “Implementation Of Reed Muller Code In MATLAB”, International Journal of Scientific and Engineering Research (IJSER),Volume 4 Issue 9 page 1884-1887, (ISSN 2229-5518).
Shivangi Tyagi, Ruchi Gupta, Ayushi Aeran “VLSI Implementation Of Adder Design Using Reversible Logic Gates” Proceeding of International conference on ICRTAE 2013 organized by Vidya college of Engineering, Meerut.
Shivangi Tyagi, Ruchi Gupta “VLSI Implementation Of Optimized Reversible Bcd Adder” Conference on Advances in Communication and Control Systems 2013 (CAC2S 2013)[Atlantis/Springer press]
Shivangi Tyagi, Navin Saini “Energy Optimized Routing For Wireless Sensor Networks Using Fuzzy Technique” Proceeding of National conference on “Recent Advances in Microwave Engineering” (Dec. 16-17, 2011) in Dept. of Electronics, Madhav Institute of Technology & Science, Gwalior.
Vidwan Id:-386012
Memberships
Member of The Institution of Engineers (IEI India).
Member of VLSI Society of India (VSI).
Member of Association for Computing Machinery (ACM).
Associate Member of Universal Association of Computer and Electronics Engineers (UACEE)